Systems and methods for serial cancellation

ABSTRACT

A receiver in a CDMA system comprises a front end processor that generates a combined signal per source. A symbol estimator processes the combined signal to produce symbol estimates. An S-Matrix Generation module refines these symbol estimates based on the sub channel symbol estimates. An interference canceller is configured for cancelling interference from at least one of the plurality of received signals for producing at least one interference-cancelled signal.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority to U.S. patent application Ser. No. 11/893,707, entitled “Methods for Estimation and Interference Cancellation for signal processing,” and filed Aug. 17, 2007; which claims priority to (1) U.S. Patent Application No. 60/838,262, entitled “Technique for estimating user and background noise powers in a code division multiple access system without signaling assistance and application of such to channel quality measurement with a linear receiver,” and filed on Aug. 17, 2006; (2) U.S. patent application Ser. No. 11/452,027, entitled “Iterative Interference Cancellation Using Mixed Feedback Weights and Stabilizing Step Sizes,” and filed Jun. 13, 2006, now U.S. Pat. No. 7,715,508; (3) U.S. patent application Ser. No. 11/432,580, entitled “Interference Cancellation in Variable Codelength Systems for Multi-Access Communication,” and filed May 11, 2006, now U.S. Pat. No. 7,697,595; (4) U.S. patent application Ser. No. 11/003,881, entitled “Systems and methods for serial cancellation,” and filed on Dec. 3, 2004, and published as U.S. Patent Application Publication Number 2005-0123080 A1; (5) U.S. patent application Ser. No. 10/686,829, entitled “Method and Apparatus for Channel Amplitude Estimation and Interference Vector Construction,” and filed on Oct. 15, 2003, now U.S. Pat. No. 7,580,448, which claims priority to U.S. Patent Application No. 60/418,187, entitled “Method for channel amplitude estimation and interference vector construction,” and filed Oct. 15, 2002; and (6) U.S. patent application Ser. No. 10/669,954, entitled “Method and Apparatus for Selectively Applying Interference Cancellation in Spread Spectrum Systems,” and filed on Sep. 23, 2003, now U.S. Pat. No. 7,787,518, which claims priority to U.S. Patent Application No. 60/412,550, entitled “Controller for interference cancellation in spread spectrum systems,” and filed Sep. 23, 2002. The entirety of each of the foregoing patents, patent applications, and patent application publications is incorporated by reference herein.

BACKGROUND

1. Field of the Invention

The invention generally relates to the field of signal processing. More specifically the invention is related to estimating powers of user subchannels and interference for the purpose of interference cancellation and error decoding.

2. Discussion of the Related Art

With the advent of new CDMA standards for Data transmission, there has been an ever-growing demand for higher data rates. However, interference degrades signal detection, tracking, and demodulation capabilities of a CDMA receiver by impeding the recovery of a signal of interest. Interference can occur when one or more unwanted signals are received simultaneously with a signal of interest. The interfering signals increase the total energy of the received signal, but decrease the Signal to Noise Ratio (SNR) of the signal of interest. Examples of such interference include multiple-access interference (MAI) and inter-symbol interference (ISI).

ISI can occur in a dispersive (e.g., multipath) environment when a transmitted signal propagates over multiple signal paths to produce an interfering signal path and a selected signal path that differentially arrive at a receiver, thereby hindering processing of the selected signal path. MAI may include interference caused by signal paths emanating from other transmitters, thereby hindering the processing of a signal from a desired transmitter. Although CDMA employs orthogonal multiple-access spreading (e.g., covering) codes to broadcast different messages to different users, multipath delay can disrupt the orthogonality between different coded subchannels. Thus, a receiver may employ interference cancellation to extract a message intended for it from a linear combination of coded signals.

Prior-art interference-cancellation techniques employ symbol estimates for data modulated on coded subchannels for synthesizing an estimated interference signal. For example, symbol estimation performed on a per-finger basis prior to S-matrix (i.e., interference matrix) generation, which is also known as “SMG.” The estimated interference signal is cancelled from the received signal to produce an interference-cancelled signal.

In prior-art error decoding, the assumption usually made is that the noise and interference power is the same across all subchannels, and the quality of the symbol estimates therefore assumes that the noise observed on the pilot is the same as that for a subchannel of interest.

SUMMARY OF THE INVENTION

In view of the foregoing background, embodiments of the present invention may provide for symbol estimation and symbol quality estimation (S Matrix generation or SMG) in an interference-cancellation system. A symbol estimation unit uses a combined signal from multiple fingers (which are assigned to different multipaths) to produce symbol estimates. Combining signals from the fingers provides diversity advantages that can improve symbol estimates for the interfering paths. An alternative embodiment of SMG may use a linear or non-linear equalizer at the front end. The symbol estimates are then refined to produce symbol quality estimates. An interference vector may be constructed by combining the symbol estimates, and the symbol quality estimates, along with other signals present in the receiver.

In one receiver embodiment, the symbol quality estimates are weights per subchannel that are applied to the symbol estimates.

Active fingers assigned to multipaths of a particular sector may be processed via a first SMG module. In one embodiment, a threshold detector may process signals from the active fingers to determine if each finger signal is strong enough to increase the reliability of the symbol estimates. The thresholds may employ pilot-strength estimates and/or noise-strength estimates as metrics. Other active fingers assigned to multipaths from other sectors in soft/softer handoff may be assigned to another SMG module. Additional fingers may be provided to track paths from other sectors that may be strong enough to cause interference, but which are not used for transmitting data to the receiver.

In some receiver embodiments, dedicated finger hardware is not used. Rather, offline fingers running faster than real-time are used. Thus, the term “finger” is intended to refer to Rake-finger function, and not necessarily the Rake finger structure. The term “finger” in an equalizer context refers to the functionality of resolving the timing of individual paths, since the equalizer may use a different form of combining (from the Rake) of the different rays.

For systems employing time-multiplexed pilots, embodiments of the invention may provide for additional hardware to generate PN-sequence information, time-tracking information, and information pertaining to chip-enables and symbol boundaries needed to perform interference cancellation for paths in which time tracking is not being performed. An EVDO receiver embodiment may process paths from sectors that are part of the active set, but not the current serving sector for the receiver. A CDMA2000 receiver embodiment may process interfering paths from sectors that are either not part of the active set or are part of the active set, but not currently assigned to a finger.

In one receiver embodiment, a control unit may be configured for switching off a canceller at predetermined times, such as for improving power efficiency in the receiver. In some embodiments, the canceller may be configured to perform iterative interference cancellation to further improve the signal quality.

In one receiver embodiment, user powers and background noise power are estimated using the front-end processor, and an estimation module that uses the Rake or equalizer output powers.

Embodiments of the invention may be employed in any receiver configured to operate with existing CDMA standards, such as IS-2000, IS-856 EV-DO (Evolution-Data Optimized), IS 95A/B, S-DMB, and the 3GPP standards such as WCDMA and HSPA.

Receivers and cancellation systems described herein may be employed in subscriber-side devices (e.g., cellular handsets, wireless modems, and consumer premises equipment) and/or server-side devices (e.g., cellular base stations, wireless access points, wireless routers, wireless relays, and repeaters). Chipsets for subscriber-side and/or server-side devices may be configured to perform at least some of the receiver and/or cancellation functionality of the embodiments described herein.

Various functional elements, separately or in combination, depicted in the figures may take the form of a microprocessor, digital signal processor, application specific integrated circuit, field programmable gate array, or other logic circuitry programmed or otherwise configured to operate as described herein. Accordingly, embodiments may take the form of programmable features executed by a common processor or a discrete hardware unit.

These and other embodiments of the invention are described with respect to the figures and the following description of the preferred embodiments.

BRIEF DESCRIPTION OF THE DRAWINGS

Embodiments according to the present invention are understood with reference to the following figures:

FIG. 1 shows an embodiment of the invention consisting of a front-end, a symbol estimator, and a symbol quality estimator coupled with a post-processor.

FIG. 2 is a general schematic illustrating an EV-DO transmitter.

FIG. 3A illustrates details of the Data Chip Generator shown in FIG. 2.

FIG. 3B illustrates details of the Mac Chip Generator shown in FIG. 2.

FIG. 3C illustrates details of the Pilot Chip Generator shown in FIG. 2.

FIG. 4 illustrates a receiver in accordance with one embodiment of the invention comprising an Interference Canceller and a Rake.

FIG. 5 illustrates an embodiment of a Rake Finger.

FIG. 6 is a detailed schematic of the Symbol estimator (Decover) block shown in FIG. 4.

FIG. 7 illustrates one possible embodiment of the Symbol quality Estimator (SMG) shown in FIG. 4.

FIG. 8 illustrates the process of using weights computed using the symbol estimates to weigh the symbol estimates obtained per base station.

FIG. 9 is a schematic of the front end showing the operations needed to generate estimates of noise and interference.

FIG. 10 is a schematic of the estimation of user powers and background noise power.

FIG. 11 is a schematic of the estimation of instantaneous signal to interference plus noise ratio for a user of interest.

FIG. 12 shows a Decover block configured to operate in a system complying with the CDMA 2000 1xRTT standard.

FIG. 13 shows an SMG configured to operate in a system complying with the CDMA 2000 1xRTT standard.

FIG. 14 illustrates an error decoding operation built as an embodiment of this invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

FIG. 1 shows an embodiment of the invention. The front end processor 120 receives a signal from one or more antennae (two are shown in the figure, as an example), using an RF front end 110, which performs operations such as down conversion, A/D conversion (not shown), and then the front end resolves the signal into the constituent multipaths from various sources such as base stations. As is understood in the art, a single stream of received baseband data may be composed of multiple constituent signals all arriving from different sources, and within each source, typically composed of rays arriving at different times. This resolution may use a searcher finger and finger management, which is well known in the art. The front end processor may also include functionality to select which subset of the sectors and paths it is receiving should be used for the purposes of generating symbol estimates. More details about how the front-end processor may perform this function are described in U.S. patent application Ser. No. 10/669,954, entitled “Method and apparatus for selectively applying interference cancellation in spread spectrum systems,” and filed on Sep. 23, 2003, now U.S. Pat. No. 7,787,518, the entire contents of which are hereby incorporated by reference. The front-end also applies the appropriate receive filter, and typically performs a dispreading operation using the codes of the source signal being assigned to the symbol estimator. The front-end processor creates a single stream of data per transmitting source that can then be used to recover symbol estimates for that source.

A symbol estimator module 130 operates on the signals and sectors thus resolved and generates symbol estimates for multiple user subchannels that are part of the transmission. The estimation may use either a Rake like structure where multipaths are “raked” together to generate a single stream of data per transmitting source, or an equalizer such as a linear LMMSE equalizer or a non linear equalizer such as a Decision feedback equalizer. Estimation usually involves performing operations that would be performed in normal demodulation operations, but extended to multiple sources and subchannels, for the purposes of this invention. For example, in an HSDPA system or DO system, operations such as despreading and decovering may normally only be performed for the active sector, but for the purposes of interference cancellation, may be performed on all sectors and signals considered ‘strong’. Estimation for CDMA may be performed using a Fast Walsh transform (sometimes referred to as a Fast Hadamard Transform) in order to efficiently produce multiple symbol estimates, while estimation for OFDM systems may be performed using a FFT (Fast Fourier Transform). Symbol estimates are then refined in a subsequent symbol quality estimator module 140 where the raw symbol estimates undergo further processing to generate signal metrics for multiple user subchannels. Such a step of refinement is needed since the raw symbol estimates are often colored by the noise and interference that are inherent in the symbol estimates. Such refinement may include filtering the symbol estimates, thresholding, weighting, debiasing of the estimates, and performing soft, hard or mixed decisions, or some combination of these operations. Some of the steps of refinement may take into account information about the standard (such as all traffic subchannels in an EV-DO transmission being transmitted at the same amplitude, OVSF codes in an HSDPA transmission being of the same amplitude) or information available to the receiver through signaling about user subchannels that may or may not be present in the signal. After refinement, the signal metrics generated by the symbol quality estimator are combined with the symbol estimates in a processor 150 and then used in a signal post-processor 160 to help recover the information in a desired subchannel. Such processing may include interference cancellation in order to mitigate interference, the generation of channel quality information (CQI) for providing feedback to a transmitter about the quality of the received data, or decoding processes that perform error decoding using the symbol estimates and the signal quality metric thus generated.

This invention will be now be further described in the context of the EV-DO standard.

FIG. 2 is a general schematic of an EV-DO transmitter. Data symbols are input to a Data Chip Generator 204, which generates I and Q data chips at 1.2288 Mcps. Similarly, Mac Chip Generator 208 generates MAC chips, and Pilot Chip Generator 212 generates pilot chips. A Time Division Multiplex (TDM) block 216 multiplexes the data, MAC, and pilot chips according to the slot specification in IS-856 standard to produce multiplexed data. Different channels are transmitted on a TDM slot basis with data chips taking the major portion of any time slot. Each slot is 2048 chips long with two pilot chip bursts in the middle of each half slot. If there is no data for transmission, an idle slot format having pilot bits, but containing no data, is used. A Quadrature Spreading block 220 performs a complex multiplication of the multiplexed data with a complex Pseudo Noise (PN) code. Each of the resulting spread data streams are processed by a Transmit filter f(k) 224, modulated onto carriers and transmitted.

FIG. 3A illustrates details of the Data Chip Generator 204 shown in FIG. 2. The Data Chip Generator 204 may be configured to operate in Data Mode or Preamble Mode. In Data Mode, the Data Chip Generator 204 outputs the data symbols to a Symbol Processor 304, which typically comprises an Error Control Coder (ECC), a Scrambler, a Channel lnterleaver, a Modulator, and a Repetition/Puncture block (not shown). Coded data is passed through a ¼-gain block 324 to normalize power, a Serial to Parallel converter (S/P) 328, and a length-16 Walsh-covering block 332. The Walsh-covering block 332 outputs baseband Walsh-covered I and Q data chips.

In Preamble Mode, all zeros are passed through a Symbol Processor 308 that is functionally similar to the Symbol Processor 304. Symbol outputs from the Symbol Processor 308 are Walsh covered by a length-32 Walsh-covering block 336, which multiplies the symbol outputs by a k^(th) row of a 32×32 Hadamard matrix, where k denotes a particular subchannel assigned to a user of interest.

FIG. 3B illustrates details of the Mac Chip Generator 208 shown in FIG. 2. Values of k are assigned using a unique MacIndex of for each user. At the time of connection setup, an Access Network (AN) assigns a particular MacIndex to each mobile. This MacIndex is unique for an access terminal's communication with a particular AN. No data symbols are transmitted on the Q channel for Preamble chips. The MAC symbols are processed by Symbol Processors 312 and 316, Serial-to-Parallel processors 346 and 351, Channel-Gain Processors 344 and 350, and length-64 Walsh-Cover blocks 348 and 352. The Walsh-Cover blocks 348 and 352 perform Walsh covering and adding to produce baseband I and Q Walsh-covered MAC chips.

FIG. 3C illustrates details of the Pilot Chip Generator 212 shown in FIG. 2. Zeros are processed by a Symbol Processor 320, followed by a Walsh-Cover block 356 configured to perform Walsh covering with an all-zeros Walsh to produce the pilot chips. Only the I channel is used for transmitting pilot chips.

FIG. 4 illustrates a receiver in accordance with one embodiment of the invention, where the post-processor comprises an Interference Canceller 412 and the front end comprises a searcher 432, an RF front end 436, and a Rake 416. An RF front end 436 (which typically comprises an AGC, an ADC, and a receive filter) processes a received signal from one or more receive antennae to produce baseband IQ data. The IQ data is provided to a searcher block 432 to identify multi paths used to update the Rake 416.

The Rake 416 illustrates details of one exemplary embodiment. The Rake module 416 comprises a set of Rake fingers 420 and a plurality of Signal Quality Estimate Blocks 440 and 442. However, other embodiments of a Rake may be used without departing from the spirit and scope of the invention. For example, a single finger may be employed for processing all of the multi paths in a Time Division Multiplexed (TDM) mode. Furthermore, different Rake embodiments may be used for estimating interference vectors. A Processing and Control Unit 428 may be employed for handling switchovers between different Rake modes, and also may perform finger management functions. Alternatively, a separate Rake module may be provided for estimation in addition to a Rake module employed for decoding.

FIG. 5 illustrates an embodiment of the Rake Finger 420 shown in FIG. 4. Raw IQ Data is down-sampled 516 with respect to chip boundaries to extract the on-time samples and despread 520 using properly aligned PN sequences. If a single PN generator is used per finger for both Rake reception and interference cancellation, proper alignment may include masking the PN sequences forward or backward in order to account for processing latency due to interference cancellation. Alternatively, delays and buffers (not shown) may be used to maintain proper alignment of the PN sequences.

The despread data is processed by a Pilot Sample Extractor 504, which drives a Phase-Estimation block 508. Different implementations of the Phase-Estimate block 508 are well known in the art and may be incorporated herein. A phase rotator 524 rotates the despread data by the phase conjugate to mitigate effects of fading and phase errors. The phase rotator 524 may also scale the data to maximize the combined SNR. The sequence of the despreading operation and the phase rotation may also be interchanged, if that provides any architectural advantages in the specific embodiment since both are linear operations, and the order of the operations does not affect the result. In some embodiments, interference cancelled data may be used to generate the channel estimates, after performing suitable buffering.

Signals from fingers assigned to a single symbol estimator are added together at the chip level. This scheme of combining energies from different fingers from a single source is a form of Maximal ratio combining, and is well known in the art. In some embodiments, alternative scaling techniques may be used to weight each finger's data. Alternative scaling techniques may employ any combination of information about the signal, interference, noise energy present in the path tracked by each finger, and cross correlations between fingers when multiple receive antennas are employed. For example, signal quality estimators 440 and 442 shown in FIG. 4 may be employed for generating finger weights.

Alternately, an equalizer may be used to combine the plurality of signals arriving at different times, and potentially, from different antennas into a single equalized signal.

Each finger F₁-F_(L) in the set of fingers 420 passes PN data to an Alignment Calculator 412 that outputs a global PN along with alignments of PN's of each finger with respect to the global PN. This calculation may be done only once for multiple iterations of interference cancellation in a given data window. The phase estimates (channel estimates) made by block 408 and corresponding blocks in each of the fingers F₁-F_(L) are provided to the Canceller 412.

Each finger's F₁-F_(L) output may be scaled by a scalar factor that is proportional to the corresponding finger strength before the outputs are added at the chip level. Despread (PN-stripped) data from each finger that is phase rotated and scaled is added together by a combiner 444 and processed by a decover block 424. The despreading operation may be applied after the combiner as well, in a different embodiment. If the Canceller 412 is disabled, output data from the decover block 424 is coupled directly to a switch 452. If the Canceller 412 is enabled, an output of the Canceller block for each finger is reinserted into the Rake 416 for each of the fingers F₁-F_(L).

In an alternative embodiment, the Canceller 412 outputs may be routed through a control switch (not shown) that compares the signal quality (such as SNR or SINR) for each improved finger signal with corresponding quality estimates from the originally received, raw IQ data. The signal having the best SNR is routed to each of the fingers F₁-F_(L). The routing decision may be made once every symbol or over a predetermined number of symbols. The decoder block 448 includes a descrambler, a de-interleaver, and a error decoder for a corresponding error control coding block in the transmitter.

FIG. 6 is a detailed schematic of the Symbol estimation block 424 shown in FIG. 4, which in this embodiment performs its function by decovering. PN-stripped, phase-stripped MRC data from the Rake 416 is processed by a demultiplexer 604, which separates the data/preamble chips, Mac chips, and pilot chips. The data/preamble chips are processed by a Data/Preamble Discriminator 608 to distinguish between Data and Preamble chips. Data chips are processed by a Serial to Parallel converter (S/P) 612. The symbol estimator performs its function by Walsh decovering (multiplication by the appropriate Hadamard code and summing up the chips) by a Walsh decover block 616 to produce decovered symbols α₁ through α₁₆. Any of the Walsh-decover blocks, such as blocks 616, 620, and 624 may be configured to perform a Fast Walsh Transform or a Fast Hadamard Transform.

Preamble chips are processed by an S/P block 615 and Walsh decovered by Walsh decover block 620 to yield α¹ ₁ through α¹ ₃₂. MAC chips are processed through an S/P block 618 and Walsh decovered by Walsh decover block 624 to yield α¹¹ ₁ through α¹¹ ₆₄ Outputs of the Decover block 424 α₁ through α₁₆, α¹, through α¹ ₃₂, and αa¹¹ ₁ through α¹¹ ₆₄ are input to the canceller 412, which uses the decovered data in an SMG 404. Alternatively, the decovered data may be bypassed to the switch 452.

FIG. 7 illustrates one possible embodiment of the symbol quality estimator SMG 404 shown in FIG. 4. Walsh energies or amplitudes from the Decover block 424, either of which would represent the symbol estimates, are input into the symbol quality estimator or SMG 404, which further refines these estimates. Amplitudes α₁ through α₁₆ are provided to a buffer 706 whose depth may be varied by a Processing and Control Unit 428 shown in FIG. 3. The buffer 706 output is provided to a Signal Processor 704, which is configured to calculate average signal strengths in each received Walsh subchannel. This is carried out using filters that are well known in the art such as FIR filters and IIR filters. The Signal Processor 704 uses these average strengths for performing signal quality estimations. These could include generating weights, or performing soft, hard or mixed decisions. The signal processor may also select a subset of the Walsh subchannels. For example, the Signal Processor 704 may select the strongest 12 out of a total of 16 Walsh subchannels.

The signal constellation (QPSK/8PSK/16QAM, etc.) used to transmit data is typically known at the receiver. If all the constellation points have the same energy, which is the case when QPSK and 8-PSK are employed, the Signal Processor 704 may use an averaged amplitude (such as may be derived from averaged strengths or calculated using a separate filter) and sign of the current symbol's amplitude for each Walsh code in order to construct an interference vector. In some embodiments, the averaged amplitude may be derived over time and/or different Walsh codes if all the Walsh codes are known to have been transmitted with the same strength. The process of filtering the symbol estimates in each Walsh subchannel is referred to as Channel Noise Averaging (CNA).

FIG. 8 shows a weighting module (such as weighting module 801) configured to separately process input symbol estimates corresponding to a plurality B of base stations. A plurality of scaling modules 801-803 scale the input symbol estimates. Scaling module 802 depicts detailed functionality for processing signals from an exemplary s^(th) base station. Similar details are typically present in each of the scaling modules 801-803.

A plurality K_((s)) of symbol estimates {{circumflex over (b)}_((s),k) ^([i])}_(k=0) ^(K) ^((s)) ⁻¹ of transmitted symbols {{circumflex over (b)}_((s),k) ^([i])}_(k=0) ^(K) ^((s)) ⁻¹ produced by an i^(th) symbol estimator is input to scaling module 802. The symbol estimates are multiplied 810-811 by corresponding complex weights {γ_((s),k) ^([i])}_(k=0) ^(K) ^((s)) ⁻¹ to produce weighted symbol estimates {γ_((s),k) ^([i])}_(k=0) ^(K) ^((s)) ⁻¹. The magnitude of weight γ_((s),k) ^([i]) may be calculated with respect to a merit of the corresponding symbol estimate {circumflex over (b)}_((s),k) ^([i]).

The weights may be calculated based on either the instantaneous or the filtered symbol estimates.

The soft weights can be regarded as a confidence measure related to the accuracy of a decision, or symbol estimate. For example, a high confidence weight relates to a high certainty that a corresponding decision is accurate. A low confidence weight relates to a low certainty. Since the soft weights are used to scale decisions, low-valued weights reduce possible errors that may be introduced into a calculation that relies on symbol estimates.

The weights may be a function on the amplitude or power of the symbol estimates, or may be a function of its SINR (Signal to Interference Plus Noise ratio). The SINR (and thus, the soft weights) may be evaluated using techniques of statistical signal processing, including techniques based on an error-vector magnitude (EVM). An estimation of the noise floor may be performed. Alternatively, a pilot-assisted estimate of the broadband interference-plus-noise floor, together with a user specific estimate of the signal-plus-interference-plus-noise floor, may be used to estimate the SINR values.

In iterative systems, there is an additional parameter to as to which set of symbol estimates are to be used for performing symbol quality estimation. In one embodiment, the symbol estimates from the latest iteration are used. In another embodiment, weights are generated for all iterations, and the weights from the set of weights yielding the highest SINR are used for weighing the symbol estimates. In yet another embodiment, a combination of the weights is used, such as an average of the weights across the iterations.

The Signal Processor 704 outputs values a₁ through a₁₆, which are respective Walsh weights used in Cover and Sum block 716. For example, if an idle slot is detected, the Signal Processor 704 may process α₁ through α₁₆ and set a₁ through a₁₆ to zero at the output if no Walsh channels are present during idle slot. A length-16 Walsh cover is multiplied by each of the values a₁ through a₁₆ and added chip by chip at the Cover and Sum block 716.

A Preamble Signal Processor 708 and a covering block 720 are configured for processing preamble Walsh signals to produce preamble chips. Similarly, a MAC Signal Processor 712 and a covering block 720 are configured for processing MAC Walsh energies to generate MAC chips. A Time Division Multiplexer (TDM) 728 multiplexes pilot chips and chips produced by the covering blocks 716, 720, and 724 according to the slot format specified in IS-856. The TDM's 728 output is multiplied by a global PN from the Alignment Calculator block 512 and provided to the filter g(k) 740, which is a convolution of the transmit and receive filter. The filter 740 output may be provided to the SMG post processor 408.

In another embodiment, the estimation of the symbol quality and specifically, the noise and user powers may be made without the simplifying assumptions made in the previous section.

FIG. 9 outlines initial processing of the received signal. The following formula represents a received CDMA signal on antenna a (of a possible multiplicity of antennas 901.1-901.A) that has been converted from radio frequency (RF) to baseband 902.1-902.A and then sampled during the n-th symbol interval to form a vector 903.1-903.A; it includes transmissions from multiple base stations 900.1-900.B and all appropriate analog filtering and automatic gain control,

$\begin{matrix} {{{\underset{\_}{r}}_{a}\lbrack n\rbrack} = {{\sum\limits_{d = {- 1}}^{1}{\sum\limits_{k = 1}^{N_{b}}{{H_{a,k}\lbrack d\rbrack}{S_{k}\left\lbrack {n - d} \right\rbrack}{WP}_{k}^{1/2}{{\underset{\_}{b}}_{k}\left\lbrack {n - d} \right\rbrack}}}} + {{\underset{\_}{z}}_{a}\lbrack n\rbrack}}} & {{Equation}\mspace{14mu} 1} \end{matrix}$

with the following definitions

-   -   N_(b) is the number of base station identified by the receiver         (i.e., those base stations whose. channel gains and spreading         sequences are tracked 904);     -   b _(k) [n] is a column vector that contains the transmitted data         vector from base station k in the n-th symbol interval;     -   P_(k) ^(1/2) is a matrix of user amplitudes for base station k;     -   W=└w ₁ w ₂ . . . w _(N) _(c) ┘ is an N_(c)×N_(c) matrix whose         columns are the common spreading sequences (e.g., Walsh         sequences) employed for the channels on all base stations;     -   S_(k)[n] is a diagonal matrix that contains base station k's         scrambling sequence (e.g., PN cover) during the n-th symbol         interval down its main diagonal; for the purpose of power         estimation, these are modeled as independent and identically         distributed (i.i.d.) complex Bernoulli random variables;     -   H_(a,k)[d] is the matrix model for the multipath spreading         channel linking the k-th transmitter to the a-th antenna of the         mobile at delay d, where d=0 corresponds to the current symbol,         d=1 to the postcursor symbol, and d=−1 to the precursor symbol         (note that the transmitted data symbols are numbered such that         all base stations transmit symbol n within one symbol period);     -   z _(a) [n] is an i.i.d. sequence of additive noise vectors for         the processing on the a-th antenna chain with mean zero and         covariance σ²I where σ² accounts for all received power not         explicitly modeled (RF noise, unidentified interference, etc.).

If multilevel codes are part of the CDMA network such that some users have shorter spreading sequences than others (e.g., WCDMA/HSDPA), then the terms just described hold with the following modifications

-   -   W=└w ₁ w ₂ . . . w _(N) _(c) ┘ is an N_(c)×N_(c) matrix whose         columns are the common surrogate spreading sequences (e.g.,         Walsh sequences) that are assumed as-if-employed for the         channels on all base stations;     -   b _(k)[n] is a column vector that contains the surrogate symbols         in a transmitted data vector from base station k in the n-th         symbol interval;

While the surrogate symbols and sequences are not the actual symbols and sequences employed by some of the users, the estimated powers will still be accurate by virtue of the structure of OVSF (orthogonal variable spreading factor) codes as employed in such CDMA systems. Moreover, the LMMSE and time-averaged LMMSE receivers (which may be employed using parameters determined in this invention) are unchanged even if this surrogate approach is taken. More details are covered in U.S. patent application Ser. No. 11/432,580, entitled “Interference cancellation in variable codelength systems for multi-access communication,” and filed on 11 May 2006, now U.S. Pat. No. 7,697,595, the entire contents of which are hereby incorporated by reference.

The terms in Equation 1 may be consolidated into the following matrix equation r[n]=H ₀ [n]P ^(1/2) b[n]+H ₁ [n]P ^(1/2) b[n+1]+H ⁻¹ [n]P ^(1/2) b[n−1]+ z[n]  Equation 2

with the definitions

-   -   b[n] is the column vector obtained by stacking the base station         symbol vectors, b ₁[n], . . . , b _(N) _(b) [n] into a single         vector;     -   P^(1/2)=diag {P₁ ^(1/2) . . . P_(N) _(b) ^(1/2)} is a diagonal         matrix with the user powers from each base station down the main         diagonal;

${H_{d}\lbrack n\rbrack} = \begin{bmatrix} {{H_{1,1}\lbrack d\rbrack}{S_{1}\left\lbrack {n - d} \right\rbrack}W} & \ldots & {{H_{1,N_{b}}\lbrack d\rbrack}{S_{N_{b}}\left\lbrack {n - d} \right\rbrack}W} \\ \vdots & \ddots & \vdots \\ {{H_{A,N_{b}}\lbrack d\rbrack}{S_{N_{b}}\left\lbrack {n - d} \right\rbrack}W} & \ldots & {{H_{A,N_{b}}\lbrack d\rbrack}{S_{N_{b}}\left\lbrack {n - d} \right\rbrack}W} \end{bmatrix}$

-   -    is the effective channel over all antennas (1 to A) and all         base stations (1 to N_(b)) at time n and delay d which is         estimated 906.

A Rake receiver 907 acting on all identified base stations matches to the effective channel at the n-th symbol interval according to q[n]=H₀*[n]r [n] which, upon expansion, yields the following model for a single symbol's worth of data: q[n]=R ₀ [n]P ^(1/2) b[n]+L ⁻¹ [n]P ^(1/2) b[n−1]+L ₁ [n]P ^(1/2) b[n+1]+u[n],  Equation 3 where R₀[n]=H₀*[n] H₀[n] is the instantaneous correlation matrix for symbol n (with the superscript * indicating the complex-conjugate transpose operation), L⁻¹[n]=H₀*[n]H⁻¹[n] is the postcursor transfer matrix, L₁[n]=H₀*[n]H₁[n] is the precursor transfer matrix, and u[n] is a zero mean additive noise vector with covariance σ²R₀[n].

In order to estimate unknown powers (see FIG. 10), it will be necessary in the sequel to employ the second order statistics of the Rake output. For the n-th symbol interval, the instantaneous statistics conditional on the scrambling sequences are

$\begin{matrix} {{{(a)\mspace{14mu} E\left\{ {{\underset{\_}{q}\lbrack n\rbrack}❘\left\{ {{S_{1}\left\lbrack {n - d} \right\rbrack},\ldots\mspace{14mu},{S_{N_{b}}\left\lbrack {n - d} \right\rbrack}} \right\}_{d = {- 1}}^{1}} \right\}} = \underset{\_}{0}}{(b\;)\mspace{14mu}\begin{matrix} {{Q\lbrack n\rbrack} = {E\left\{ {{{\underset{\_}{q}\lbrack n\rbrack}{{\underset{\_}{q}}^{*}\lbrack n\rbrack}}❘\left\{ {{S_{1}\left\lbrack {n - d} \right\rbrack},\ldots\mspace{14mu},{S_{N_{b}}\left\lbrack {n - d} \right\rbrack}} \right\}_{d = {- 1}}^{1}} \right\}}} \\ {= {{{R_{0}\lbrack n\rbrack}{{PR}_{0}\lbrack n\rbrack}} + {{L_{- 1}\lbrack n\rbrack}{{PL}_{- 1}^{*}\lbrack n\rbrack}} + {{L_{1}\lbrack n\rbrack}{{PL}_{1}^{*}\lbrack n\rbrack}} +}} \\ {\sigma^{2}{R_{0}^{*}\lbrack n\rbrack}} \end{matrix}}} & {{Equation}\mspace{14mu} 4} \end{matrix}$

Another expectation with respect to the scrambling sequences {S_(k)[n−d]}_(k=1,d=−1) ^(N) ^(b) ^(,1) gives the average (i.e., time-independent) correlation matrix for a fixed set of multipath channels: Q=E{Q[n]}.  Equation 5

The elements of this matrix may be estimated with an empirical average over multiple symbol intervals, e.g.

${\overset{\sim}{Q} = {\frac{1}{N}{\sum\limits_{n = 1}^{N}{{\underset{\_}{q}\lbrack n\rbrack}{{\underset{\_}{q}}^{*}\lbrack n\rbrack}}}}},$ or any other of the various types of moving average or autoregressive estimators. It is only the diagonal elements of this matrix that are of primary interest; these are the RAKE output powers 1001. If an equalizer is used at the front end instead of a Rake, those would also yield a similar set of powers. The key step is to represent them analytically in terms of the quantities that are to be estimated namely the sub channel powers and the background noise power. The k-th RAKE output power, where k=1, 2, . . . , K with K=N_(b)N_(c) (i.e., the total number of subchannels in the system), is expressible as

$\begin{matrix} {Q_{kk} = {{\sum\limits_{j = 1}^{K}{\left( {{E\left\{ {{\left( R_{0} \right)_{kj}\lbrack n\rbrack}}^{2} \right\}} + {E\left\{ {{\left( L_{- 1} \right)_{kj}\lbrack n\rbrack}}^{2} \right\}} + {E\left\{ {{\left( L_{1} \right)_{kj}\lbrack n\rbrack}}^{2} \right\}}} \right)p_{j}}} + {\sigma^{2}E\left\{ {\left( R_{0} \right)_{kk}\lbrack n\rbrack} \right\}}}} & {{Equation}\mspace{14mu} 6} \end{matrix}$ where P_(j) represents the j-th diagonal element of P (i.e., the power of the j-th subchannel in the system). To proceed, it is helpful to simplify the notation according to (a)A _(kj) =E{|(R ₀)_(kj) [n]| ² }+E{|(L ⁻¹)_(kj) [n]| ² }+E{|(L ₁)_(kj) [n]| ²} (b)c _(k) =E{(R ₀)_(kk) [n]}  Equation 7

These quantities can be estimated empirically 1002 by any of the variety of moving average or autoregressive estimators. As will be discussed shortly, they may also be calculated using exact analytical formulas 1003 under mild conditions or estimated using approximations of these formulas.

The terms in Equation 6 and Equation 7 can be collected to form a single matrix equation

$\begin{matrix} {\begin{bmatrix} Q_{11} \\ Q_{22} \\ \vdots \\ Q_{KK} \end{bmatrix} = {\begin{bmatrix} A_{11} & A_{12} & \ldots & A_{1\; K} & c_{1} \\ A_{21} & A_{22} & \ldots & A_{2\; K} & c_{2} \\ \vdots & \vdots & \ddots & \vdots & \vdots \\ A_{K\; 1} & A_{K\; 2} & \ldots & A_{KK} & c_{K} \end{bmatrix}\begin{bmatrix} p_{1} \\ p_{2} \\ \vdots \\ p_{K} \\ \sigma^{2} \end{bmatrix}}} & {{Equation}\mspace{14mu} 8} \end{matrix}$

The left-hand column vector must be estimated, as previously described. The rectangular matrix just to the right of the equal sign may be estimated similarly (as previously discussed), or it may be calculated exactly (to be described shortly). The far-right column vector contains the unknowns that need to be estimated. Notice that there are K+1 unknowns, but only K independent equations, so there is not a unique solution for the unknowns. To remedy this there are several preferred embodiments of the invention. One is to assume that the background noise is weak enough that σ² can be safely ignored, such as in interference-limited scenarios; this leads to K equations and K unknowns. Another preferred embodiment is to take advantage of any base-station pilots. The power of each base-station pilot signal may be accurately estimated with a coherent estimator 1005. First consider only the estimated power of the pilot of the first base station. In other words, let {tilde over (p)}₁ ^(pilot) be the coherent estimate of p₁. The matrix equation in Equation 8 may be updated in one of two ways, both of which are now described. The first way is to let the estimate of {circumflex over (p)}₁ be given by {circumflex over (p)}₁={tilde over (p)}₁ ^(pilot) and then take that part of the right-hand side of Equation 8 that depends on p₁ to the left-hand side; this leads to

$\begin{matrix} {{\begin{bmatrix} Q_{11} \\ Q_{22} \\ \vdots \\ Q_{KK} \end{bmatrix} - {{\overset{\sim}{p}}_{1}^{pilot}\begin{bmatrix} A_{11} \\ A_{21} \\ \vdots \\ Q_{K\; 1} \end{bmatrix}}} = {\begin{bmatrix} A_{12} & A_{13} & \ldots & A_{1\; K} & c_{1} \\ A_{22} & A_{23} & \ldots & A_{2\; K} & c_{2} \\ \vdots & \vdots & \ddots & \vdots & \vdots \\ A_{K\; 2} & A_{K\; 3} & \ldots & A_{KK} & c_{K} \end{bmatrix}\begin{bmatrix} p_{2} \\ p_{3} \\ \vdots \\ p_{K} \\ \sigma^{2} \end{bmatrix}}} & {{Equation}\mspace{14mu} 9} \end{matrix}$

Note that this now has K independent equations and K remaining unknowns. In general, if this is done for the pilots of all N_(b) base stations, there will be K independent equations and K+1−N_(b) remaining unknowns. Alternatively, the matrix equation in Equation 8 may be modified to become

$\begin{matrix} {\begin{bmatrix} Q_{11} \\ Q_{22} \\ \vdots \\ Q_{KK} \\ {\overset{\sim}{p}}_{1}^{pilot} \end{bmatrix} = {\begin{bmatrix} A_{11} & A_{12} & \ldots & A_{1\; K} & c_{1} \\ A_{21} & A_{22} & \ldots & A_{2\; K} & c_{2} \\ \vdots & \vdots & \ddots & \vdots & \vdots \\ A_{K\; 1} & A_{K\; 2} & \ldots & A_{KK} & c_{K} \\ 1 & 0 & \ldots & 0 & 0 \end{bmatrix}\begin{bmatrix} p_{1} \\ p_{2} \\ \vdots \\ p_{K} \\ \sigma^{2} \end{bmatrix}}} & {{Equation}\mspace{14mu} 10} \end{matrix}$ in which the equation {tilde over (p)}₁ ^(pilot)=p₁ has been added. In general, if this is done for the pilots of all N_(b) base stations, there will be K+N_(b) independent equations and K+1 unknowns. In this case, the final estimates of the base station pilot powers may be different from their coherent estimates. In all methods just described the resulting matrix equation will have at least as many independent equations as there are remaining unknowns. In short, the set of equations may be expressed as y=Xθ  Equation 11 where the column vector y and the matrix X, which has more rows than columns and possesses full column rank, are both real-valued and known, and the unknown parameters are contained in the column vector θ.

The remaining unknowns are found by solving or approximating the solution to a constrained optimization problem such as {circumflex over (θ)}=arg min_({circumflex over (θ)}) {∥y−X{circumflex over (θ)}∥ ²:θ_(k)≧0 for all k} where ∥x∥²=Σ_(n)x_(n) ² is the square of the 2-norm of the real-valued vector x. Since the objective function is strictly convex (i.e., since X has full column rank) and the constraint set is a convex set, there is a unique solution. Any exact solution or lower-complexity approximate solution to this problem is part of the invention 1004. Moreover, the invention need not be restricted to this particular objective function. For example, other convex functions such as g(x)=Σ_(n)α_(n)x_(n) ^(s) where s>0 and α_(n)>0 for all n, are included. The constraint set may also take on different forms to include other known constraints. Given that background noise is always present in a receiver, a tighter lower bound than zero may be set to prevent the estimator from making the estimate of σ² too small. Similarly, if it is known that the power of a subchannel cannot exceed some value (e.g., the power of the pilot from its originating base station), a corresponding upper bound can be used to further restrict the constraint set.

Exact analytical representations for the following matrix

$\begin{bmatrix} A_{11} & A_{12} & \ldots & A_{1\; K} & c_{1} \\ A_{21} & A_{22} & \ldots & A_{2\; K} & c_{2} \\ \vdots & \vdots & \ddots & \vdots & \vdots \\ A_{K\; 1} & A_{K\; 2} & \ldots & A_{KK} & c_{K} \end{bmatrix}\quad$ in Equation 8 exist when the common spreading sequences are such that all chip weights have the same magnitude (e.g., Walsh sequences). By way of example, but without any limitations explicit or implied, take

${W_{ij}} = \frac{1}{N_{c}}$ for all elements of the matrix W of common spreading sequences. The scrambling sequences (i.e., PN covers) which make up the diagonal elements of each S_(k)[n] are taken to be i.i.d. complex Bernoulli random variables that are normalized to have unit variance. It is helpful to arrange the indices by base station and then partition the matrix by base station in the form

$\begin{matrix} \begin{bmatrix} A_{11} & A_{12} & \ldots & A_{1\; N_{b}} & {\underset{\_}{c}}_{1} \\ A_{21} & A_{22} & \ldots & A_{2\; N_{b}} & {\underset{\_}{c}}_{2} \\ \vdots & \vdots & \ddots & \vdots & \vdots \\ A_{N_{b}\; 1} & A_{N_{b}\; 2} & \ldots & A_{N_{b}N_{b}} & {\underset{\_}{c}}_{N_{b}} \end{bmatrix} & {{Equation}\mspace{14mu} 13} \end{matrix}$ where each A_(bb′) an N_(c)×N_(c) matrix whose row sub-indices correspond base station b and whose column sub-indices correspond to base station b′, and each c _(b) is an N_(c)×1 vector whose sub-indices correspond to base station b. Now make the definitions (a)X _(bb) =H _(b) *[O]H _(b′) [O] (b)Y _(bb′) =H _(b) *[O]H _(b′)[−1] (c)Z _(bb′) =H _(b) *[O]H _(b′)[1]  Equation 14 For the diagonal blocks when b=b′, also define the quantities (a) x _(b)=[(X _(bb))₁₁(X _(bb))₂₂ . . . , (X _(bb))_(N) _(c) _(N) _(c) ]¹ (b)Δ_(b)=diag(|(X _(bb))₁₁|²,|(X _(bb))₂₂|², . . . , |(X _(bb))_(N) _(c) _(N) _(c) |²)  Equation 15 where the superscript T denote the matrix transpose operation. Then the (k, j) element of A_(bb) is given by

$\begin{matrix} {\left( A_{bb} \right)_{kj} = {\frac{1}{N_{c}^{2}}{\underset{\_}{1}}^{T}\left( {{{N_{c}^{2}\left( {{\underset{\_}{x}}_{b} \cdot {\underset{\_}{w}}_{k} \cdot {\overset{\_}{\underset{\_}{w}}}_{j}} \right)}\left( {{\underset{\_}{x}}_{b} \cdot {\underset{\_}{w}}_{j} \cdot {\overset{\_}{\underset{\_}{w}}}_{k}} \right)^{T}} + {X_{bb} \cdot {\overset{\_}{X}}_{bb}} + {Y_{bb} \cdot {\overset{\_}{Y}}_{bb}} + {Z_{bb} \cdot {\overset{\_}{Z}}_{bb}} - \Delta_{b}} \right)\underset{\_}{1}}} & {{Equation}\mspace{14mu} 16} \end{matrix}$ where the ∘ operator denotes the Hadamard (i.e., element-wise) product, 1is the all-ones N_(c)×1 vector, and the overbar notation indicates taking the complex conjugate of every element of the vector or matrix. The off-diagonal blocks are defined by A _(bb′)={1 ^(T)(X _(bb′) ∘ X _(bb′) +Y _(bb′) ∘ Y _(bb) +Z _(bb′) ∘ Z _(bb′))1 }E,  Equation 17 where E is the all-ones matrix of dimensions N_(c)×N_(c). The following formula completes the analytical description,

$\begin{matrix} {{\underset{\_}{c}}_{b} = {\frac{{trace}\mspace{14mu}\left( x_{bb} \right)}{N_{c}}\underset{\_}{1}}} & {{Equation}\mspace{14mu} 18} \end{matrix}$

In one preferred embodiment, the estimates {circumflex over (p)}₁, {circumflex over (p)}₂, . . . , {circumflex over (p)}_(K), {circumflex over (σ)}² are used in any receiver that requires such values, including the LMMSE receiver, the time-averaged LMMSE receiver, and the optimal maximum-likelihood receiver and many of its suboptimal approximations.

In another preferred embodiment the power estimates are used to estimate the output SINR when a linear receiver is employed. To describe this aspect of the invention, the Rake receiver is considered first and it is then generalized to other linear receivers. The right-hand side of Equation 3 can be expressed in terms of signal plus noise according to q[n]=R ₀ [n]P ^(1/2) b[n]+i[n]  Equation 19 where i[n]=L⁻¹[n]P^(1/2)b[n−1]+L₁[n]P^(1/2)n[n+1]+u[n] is the interference due to background noise and inter-symbol interference (ISI); it has covariance R _(ii) [n]=L ⁻¹ [n]PL ⁻¹ *[n]+L ₁ [n]PL ₁ *[n]+σ ² R ₀ [n]  Equation 20

By way of example, suppose that the SINR of a specific subchannel, k, is desired. Then the k-th element of the Rake output in Equation 19 can be rewritten as

$\begin{matrix} {{{q_{k}\lbrack n\rbrack} = {{{\left( R_{0} \right)_{kk}\lbrack n\rbrack}p_{k}^{\frac{1}{2}}{b_{k}\lbrack n\rbrack}} + {\sum\limits_{k^{\prime} \neq k}\;{{\left( R_{0} \right)_{{kk}^{\prime}}\lbrack n\rbrack}p_{k^{\prime}}^{\frac{1}{2}}{b_{k^{\prime}}\lbrack n\rbrack}}} + {i_{k}\lbrack n\rbrack}}}\begin{matrix} {{Signal}\mspace{14mu}{of}\mspace{14mu}{Interest}} & {\mspace{14mu}\begin{matrix} {{Intra}\text{-}{cell}\mspace{14mu}{and}} \\ {{Inter}\text{-}{Cell}\mspace{14mu}{Interference}} \end{matrix}} & \begin{matrix} {{{Background}\mspace{14mu}{Noise}}\mspace{14mu}} \\ {{and}\mspace{14mu}{ISI}} \end{matrix} \end{matrix}} & {{Equation}\mspace{14mu} 21} \end{matrix}$

The output SINR for this subchannel during the n-th symbol interval is thus

$\begin{matrix} {{{SINR}_{k}\lbrack n\rbrack} = {\frac{{{\left( R_{0} \right)_{kk}\lbrack n\rbrack}}^{2}p_{k}}{{\sum\limits_{k^{\prime} \neq k}\;{{{\left( R_{0} \right)_{{kk}^{\prime}}\lbrack n\rbrack}}^{2}p_{k^{\prime}}}} + {\left( R_{ii} \right)_{kk}\lbrack n\rbrack}} = \frac{N_{k}\lbrack n\rbrack}{D_{k}\lbrack n\rbrack}}} & {{Equation}\mspace{14mu} 22} \end{matrix}$

These instantaneous SINR estimates may be used in a number of ways.

-   -   The constituent numerator and denominator may each be averaged         to obtain, respectively, the means E {N_(k)[n]} and E         {D_(k)[n]}; their ratio is the average noise power divided by         the average interference-plus-noise power.     -   The instantaneous SINR may be averaged to obtain an estimate of         E{SINR_(k)[n]}, the mean Rake SINR.     -   The instantaneous symbol error rate (SER) may be approximated         for the signal constellation being used (or an assumed         constellation if it is unknown) and then averaged to estimate         the mean SER, E{SER_(k)[n]}; for example, a QPSK constellation         has SER_(k)[n]=1−(1−Q(SINR_(k)[n]))², while formulas for other         constellations are commonly known to those familiar with the         art.     -   A bound on the maximum supportable data rate η may be obtained         by averaging the instantaneous throughput log(1+SINR_(k)[n]) to         obtain an estimate of average throughput η=E{log(1+SINR_(k)[n])}         bits per second per Hertz.

In a preferred embodiment, and as pictured in FIG. 11, a suitable channel quality estimator of any linear receiver can be obtained in a manner analogous to that described for the Rake receiver. The output of a general linear receiver may be expressed as q ^(linear) [n]Σ _(m=−M) ^(M) G[n,n]r[n−m]  Equation 23 where G[n,m] is a matrix valued filter whose entries may vary with the symbol time n, as in the exact time-varying LMMSE receiver; or may be time-invariant, as in the case of the time-averaged LMMSE receiver (e.g., the Type 2 and Type 2i receivers considered in the 3GPP standards body for WCDMA/HSDPA networks). For the case of time-invariant reception, the matrix valued coefficients can be expressed as G[n−m] and the receiver is performing standard discrete-time convolution. A substitution for r[n−m] in Equation 23 using Equation 2 yields q ^(linear) [n]=Σ _(l=−M−1) ^(M+1) F[n,l]P ^(1/2) b[n−l]+v[n]  Equation 24 where

-   -   F[n,l] is the effective channel-plus-receiver 1101 filter and         has matrix values defined by

${F\left\lbrack {n,m} \right\rbrack} = {\sum\limits_{d = {- 1}}^{1}\;{{G\left\lbrack {n,{m + d}} \right\rbrack}{H_{d}\left\lbrack {n + m - d} \right\rbrack}{\Psi_{\lbrack{{{- M} - d},{M - d}}\rbrack}\lbrack m\rbrack}}}$ where ${\Psi_{\lbrack{{{- M} - d},{M - d}}\rbrack}\lbrack m\rbrack} = \left\{ \begin{matrix} {1,} & {{{- M} - d} \leq m \leq {M - d}} \\ {0,} & {else} \end{matrix} \right.$

-   -   v[n] is a vector of filtered noise with correlation matrix 1102

${R_{vv}\lbrack n\rbrack} = {\sigma^{2}{\sum\limits_{m = {- M}}^{M}\;{{G\left\lbrack {n,m} \right\rbrack}{G^{*}\left\lbrack {n \cdot m} \right\rbrack}}}}$

This may be reworked to combine the background noise with the ISI to give

$\begin{matrix} {{{q^{linear}\lbrack n\rbrack} = {{{F\left\lbrack {n,0} \right\rbrack}P^{\frac{1}{2}}{b\left\lbrack {n - l} \right\rbrack}} + {\sum\limits_{1 \neq 0}\;{{F\left\lbrack {n,1} \right\rbrack}P^{\frac{1}{2}}{b\left\lbrack {n - l} \right\rbrack}}} + {v\lbrack n\rbrack}}}{{\underset{\_}{i}\lbrack n\rbrack}\text{:}\mspace{14mu}{Background}\mspace{14mu}{Noise}\mspace{14mu}{and}\mspace{14mu}{ISI}}} & {{Equation}\mspace{14mu} 25} \end{matrix}$ where the interference has covariance

$\begin{matrix} {{{R_{ii}\lbrack n\rbrack} = {{\sum\limits_{1 \neq 0}\;{{F\left\lbrack {n,1} \right\rbrack}{{PF}^{*}\left\lbrack {n,l} \right\rbrack}}} + {R_{vv}\lbrack n\rbrack}}}\begin{matrix} {{ISI}\mspace{14mu}{Covariance}} & {{Background}\mspace{14mu}{Noise}\mspace{14mu}{Covariance}} \end{matrix}} & {{Equation}\mspace{14mu} 26} \end{matrix}$

Focusing on a single subchannel, the k-th element of Equation 25 may be expressed as

$\begin{matrix} {{q_{k}^{linear}\lbrack n\rbrack} = {{{\left( {F\left\lbrack {n,0} \right\rbrack} \right)_{kk}\lbrack n\rbrack}p_{k}^{\frac{1}{2}}{b_{k}\lbrack n\rbrack}} + {\sum\limits_{k^{\prime} \neq k}\;{\left( {F\left\lbrack {n,0} \right\rbrack} \right)_{{kk}^{\prime}}p_{k^{\prime}}^{\frac{1}{2}}{b_{k^{\prime}}\lbrack n\rbrack}}} + {{i_{k}\lbrack n\rbrack}\begin{matrix} {{Signal}\mspace{14mu}{of}\mspace{14mu}{Interest}} & {\mspace{14mu}\begin{matrix} {{Intra}\text{-}{C{ell}}\mspace{14mu}{and}} \\ {{Inter}\text{-}{Cell}\mspace{14mu}{Interference}} \end{matrix}} & \begin{matrix} {{{Background}\mspace{14mu}{Noise}}\mspace{14mu}} \\ {{and}\mspace{14mu}{ISI}} \end{matrix} \end{matrix}}}} & {{Equation}\mspace{14mu} 27} \end{matrix}$

The remaining calculations to determine the SINR are

$\begin{matrix} \begin{matrix} {{{SINR}_{k}\lbrack n\rbrack} = \frac{{{\left( {F\left\lbrack {n,0} \right\rbrack} \right)_{kk}\lbrack n\rbrack}}^{2}p_{k}}{{\sum\limits_{k^{\prime} \neq k}\;{{{\left( {F\left\lbrack {n,0} \right\rbrack} \right)_{{kk}^{\prime}}\lbrack n\rbrack}}^{2}p_{k^{\prime}}}} + {\left( R_{ii} \right)_{kk}\lbrack n\rbrack}}} \\ {= \frac{N_{k}\lbrack n\rbrack}{D_{k}\lbrack n\rbrack}} \end{matrix} & {{Equation}\mspace{14mu} 28} \end{matrix}$ and as shown in FIG. 11 (numerator 1103 and denominator consisting of the sum 1107 of intra-cell and inter-cell interference power 1104, ISI power 1105, and background noise power 1106). In this manner, estimates of the output SINRs and achievable rates may be obtained for any linear receiver. In a preferred embodiment, one or more of the matrices which define the interference correlation matrix in Equation 26 may be removed from the calculation to simplify the resulting computation. Any of the uses for the instantaneous SINR that were described in the context of the RAKE are equally applicable to an arbitrary linear receiver.

In some embodiments, at least some of the hardware from the fingers in the Rake 416 is reused in SMG 404. The interference vectors generated by SMG post processor 308, using information from SMG 404, are cancelled out from Raw IQ data in cancellation Operator 412. Only one cancellation operator is shown, though actual implementations may have multiple operators. The cancellation Operator 412 may cancel the data at either chip-level, sample level or symbol level, depending on how it is architected. The cancellation may be carried out either explicitly by a subtraction, or by implicitly creating a signal stream with the interference removed. In another embodiment of the SMG block 404, the pilot chips and the covering block 716, 720, and 724 outputs are not time-division multiplexed, but rather, they are simply passed to the SMG Post Processor 408. One advantage of this scheme is that the cancellation Operator 412 may cancel out each pilot, MAC, and data channel independently of one another. Control Unit 428 may adapt the cancellation operator for each channel depending on operating conditions.

The SMG Post Processor 408 outputs estimated interference vectors, which may be used for cancellation in any of the active fingers F₁ through F_(L). For example, if only F₁ and F₂ are active, the first output of block 408 is time-aligned with F₂ and cancelled out of the received signal by Cancellation Operator 412. The resulting interference-cancelled signal is passed to F₁. Similarly the second output of block 408 is time-aligned with F₁ and cancelled. The resulting interference-cancelled signal is passed to F₂ in the Rake 416.

The Rake 416 combines both paths to maximize reliability of the combined signal. If there are improvements to the SNR measurement for cancelled signals on individual fingers, the SNR of the combined signal should be higher than the SNR of the uncancelled signal. Similarly, in the case of three multipaths assigned to three input fingers F₁, F₂, and F₃ respectively, the interference vectors constructed from F₁, F₂, and F₃ will be provided to the SMG Post processor 408. In one embodiment, SMG post processor 408 may concatenate the F₂ and F₃ interference vectors/matrices into one matrix. This would result in a serial cancellation operation. The serial cancellations described herein may improve signal to noise ratio (“SNR”) for a signal of interest (“SOI”) by successively and substantially canceling, or removing, interfering signals. The number of serial interference cancellations is a matter of design choice, taking into account factors, such as the number of available processing fingers, processor speed and/or acceptable time delays associated with successive cancellations. For example, the number of successive cancellations performed on an interference canceled output signal may be based on the processing constraints within a receiver.

Specifically, F₂ and F₃ would be cancelled in a serial order from the IQ data, thus providing a cleaner IQ signal to demodulate path F₁. In another embodiment, the SMG post processor 408 may perform a linear combination of interference vectors from F₂ and F₃ to produce a new interference vector prior to cancellation.

In one embodiment, the SMG Post Processor 408 processes the interference vector output from the SMG 404 and uses alignment and phase information from the Rake 416 to generate composite interference vectors. Each of the composite interference vectors is aligned to a different finger corresponding to a particular active finger. The number of composite interference vectors may be limited by a number of maximum cancellation operations that can be performed with the given hardware.

These composite interference vectors are input to the Cancellation Operator block 412, which is configured to project and/or subtract out the composite interference vectors from the baseband IQ data received at point A. Even when the canceller 412 is configured to perform multiple iterations, interference cancellation is performed on the original received baseband IQ signal for each iteration. If the first iteration of interference cancellation improves the combined SNR relative to the combined SNR of the uncancelled signal, then further iterations will typically improve the SNR, since the interference vector will be estimated from a signal having an improved SNR. Improved estimation of the interference vector may provide for better interference cancellation and improve the combined SNR.

Outputs of the Decover block 424 may be saved in memory 456. Signals from the memory 456 and the canceller 412 are input to the Switch 452. The memory 456 is initially loaded with decovered data from the baseband IQ signal. After a first iteration, the Rake 416 may combine the interference-cancelled data from the Rake fingers and provide it to the Decover block 424. If the Control Unit 428 halts iterations of the Canceller 412, decovered data from block 424 bypasses the Canceller 412 and is input to the Switch 452. Thus, decovered data from the memory 456 and interference-cancelled decovered data are input to the switch 452.

The Control Unit 428 may be configured to process signal-quality estimates for both uncancelled and cancelled data from the Rake 416. In one embodiment, the Control Unit 428 may select which of the uncancelled and cancelled data provides the best decovered data estimates. The selected data estimates are routed by the Control Unit 428 to the decoder 448. Upon each iteration of interference cancellation, the Control Unit 428 may either reload the memory with new cancelled data from the current iteration or retain the present data. Upon a final iteration, the latest interference-cancelled decovered data is coupled to the Switch 452.

Signal-quality estimates from the Rake receiver are output to the Control Unit 428, which may include a bidirectional bus connecting to the Canceller 412 via which it can receive data from the Canceller 412 and enable or disable the Canceller 412. The Control Unit 428 may also have a bidirectional bus connecting to the memory 456 via which it can receive data from the memory and also reset it.

In one embodiment, the Control Unit 428 may be employed when the Rake 416 has only one finger active. Since there is no structured interference to estimate and cancel, the Canceller 412 does not provide any gains. Thus, the Control Unit 428 may be configured to disable the Canceller 412. Similarly, the Canceller may be disabled when the data being demodulated has strict latency requirements (e.g. for Voice over Internet Protocol) and performing a subsequent iteration would compromise delay requirements. In another embodiment, the Control Unit 428 may be configured to detect if the current slot's data is intended for demodulation. If demodulation is not anticipated, the Control Unit 428 may disable the Canceller 412. The Control Unit 428 may be configured for selecting one or more dynamically changing parameters, including CNA Buffer depths.

FIG. 12 shows a Symbol estimator (Decover) block 424 configured to operate in a system complying with the CDMA 2000 1xRTT standard or the WCDMA/HSPA standard. Signals output from the Rake 416 are coupled to Fast Walsh Transform (FWT) 1208 after passing through a serial to parallel block 1204. The FWT 1208 produces a vector of Walsh energies denoted by a, which is provided to the SMG 404.

The vector a is also input to buffer 1304 and Signal Processor 1308 shown in FIG. 13. The depth of the buffer 1304 may be determined by the Control Unit 428, which may provide for dynamic control as channel conditions and signal-quality requirements vary. The buffer 1304 output is provided to the Signal Processor 1308, which calculates the time-averaged signal strength corresponding to each of the Walsh codes. The signal processor 1308 may use a variety of techniques for computing averaged strengths including filters such as FIRs and IIRs. These filters may be configurable for different time-constants, and may be programmed to reset on frame boundaries. They may also have dynamic time-constants so that at start-up, they quickly ramp up, and then later, move to a longer time-constant so that better averaging may be performed. The time-constants (which are related to the co-efficients used in the filters) may be also be adjusted based on the fading speed detected or known by the receiver. The signal processor, which performs the function of the symbol quality estimator, may also generate estimates of the noise and interference power, and a figure of merit per subchannel, such as the SINR. It may also compute a set of weights per subchannel.

The signal processor is used in the symbol quality estimator in refining the raw symbol estimates through weighing or thresholding.

In weighing, the symbol estimates received are weighed by some figure of merit of those symbol estimates, such as SINR, or signal strength, as described earlier in the specification. The weights, a are computed and applied as shown in FIG. 8.

In thresholding, the time-averaged strengths are used for selecting a subset of the Walshes for interference vector construction. In one embodiment, the Signal Processor 808 may use the averaged amplitude (which may be calculated from a filter or derived from averaged strengths) and the sign of the current symbol for each Walsh code to reconstruct the interference vector. As an example of subset selection, all Walsh codes with average strengths below a certain threshold may be discarded for interference vector/matrix construction. Thresholding can also be viewed as a very special case of weighing, where weights of one or zero are applied, based on whether the symbol estimate crosses a certain threshold or not.

The symbol estimates are then combined with the weights generated by the signal processor 1308 in a processor 1310 that combine the two to generate an interference vector. The interference vector then goes through a covering and sum operation in an Inverse Fast Walsh Transform module, after which the Spreading code for that source is applied in 1316.

In one embodiment, information from different paths may be weighted in the ratio of their strengths or signal quality estimates, and then combined. Another embodiment may estimate the interference vector on a per-finger basis. In SMGOne, cancellation of interference from multipaths is performed using interference estimates derived from only the strongest path originating from a sector. This technique assumes that the transmitted symbols from the sector are identical across all paths. Thus, the strongest path provides the best sign and amplitude estimates for all paths from that sector. Each path experiences an independent fading profile, and individual channel estimates (phase estimates derived from the pilot) may be used to properly reconstruct the interference for each path prior to interference cancellation. The estimated interference vector from the strongest multi paths may be used to cancel out interference from other multi paths of the strongest path.

Interference cancellation may be performed either through projection or subtraction. Projection-based cancellation may require more operations than subtraction based methods. But projection-based methods may be less sensitive to estimation errors, and they are invariant to scaling errors. Thus, the Control Unit 328 may be configured to switch between subtraction and projection depending on reliability of the estimated interference vector. If the reliability exceeds a predetermined dynamic/static threshold, then subtraction may be used. Alternatively, a projection operation may be performed. A projection may be preferred over subtraction when the path strengths are small or when the fading coefficients are highly uncorrelated over time. Embodiments of this invention may be realized by either subtraction based or projection based cancellation modules, as well as having a configurable canceller that switches between the methods depending on the estimation quality.

All paths input to the SMG should be multi paths from a common signal source (Base station sector or Node-B, for example). For example, in CDMA2000 and in HSDPA/WCDMA, the control unit distinguishes multi paths from other base station soft handoff paths and assigns the paths to the SMG. The control unit assigns the other active paths from the base station in soft handoff to a second vector estimation block, if available.

The estimation and cancellation embodiments described herein may be adapted to systems employing transmit and receive diversity. When multiple transmit and receive antennas are employed, it is more likely that Rake fingers are locked to stronger multipaths. Thus, better interference estimation may be performed using SMG and SMGOne schemes. In one embodiment, the control unit may switch between SMG and SMGOne schemes based on multi path and interference profiles. Alternatively, maximal ratio combining schemes may be employed with receive diversity, as is well known in the art.

Estimation of the interference vector may be further improved if the symbol quality estimator (SMG) is positioned following an error decoder (not shown). The cancellation operation may be performed at symbol level, chip level, or sample level. Since pilot symbols are known at the receiver, the interference due to a pilot signal may be estimated with higher accuracy than interference from data or Mac signals. An IS-856 system uses signal estimates from the pilot channel and a look up table (LUT) to determine the data rates. Since cancellation affects data and pilot signals in different ways, the LUT may be modified to account for this imbalance. Alternatively, an access terminal may estimate channel quality on uncancelled pilot channels.

Another embodiment of this invention may be used in error decoding where the symbol estimator 1404 generates multiple symbol estimates, including those from subchannels that are not being used in demodulation, which are then used to compute symbol quality estimates of the subchannel(s) of interest taking into account the noise and interference experienced by the subchannel(s) of interest in 1406. The symbol estimates along with its symbol estimate quality are together processed in error decoder 1408, and the decoded symbols used in further post-processing.

It is clear that the methods described herein may be realized in hardware or software, and there are several modifications that can be made to the order of operations and structural flow of the processing. Those skilled in the art should recognize that method and apparatus embodiments described herein may be implemented in a variety of ways, including implementations in hardware, software, firmware, or various combinations thereof. Examples of such hardware may include Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), general-purpose processors, Digital Signal Processors (DSPs), and/or other circuitry. Software and/or firmware implementations of the invention may be implemented via any combination of programming languages, including Java, C, C++, Matlab™, Verilog, YHDL, and/or processor specific machine and assembly languages.

Computer programs (i.e., software and/or firmware) implementing the method of this invention may be distributed to users on a distribution medium such as a SIM card, a USB memory interface, or other computer-readable memory adapted for interfacing with a consumer wireless terminal. Similarly, computer programs may be distributed to users via wired or wireless network interfaces. From there, they will often be copied to a hard disk or a similar intermediate storage medium. When the programs are to be run, they may be loaded either from their distribution medium or their intermediate storage medium into the execution memory of a wireless terminal, configuring an onboard digital computer system (e.g. a microprocessor) to act in accordance with the method of this invention. All these operations are well known to those skilled in the art of computer systems.

The functions of the various elements shown in the drawings, including functional blocks labeled as “modules” may be provided through the use of dedicated hardware, as well as hardware capable of executing software in association with appropriate software. These functions may be performed by a single dedicated processor, by a shared processor, or by a plurality of individual processors, some of which may be shared. Moreover, explicit use of the term “processor” or “module” should not be construed to refer exclusively to hardware capable of executing software, and may implicitly include, without limitation, digital signal processor DSP hardware, read-only memory (ROM) for storing software, random access memory (RAM), and non-volatile storage. Other hardware, conventional and/or custom, may also be included. Similarly, the function of any component or device described herein may be carried out through the operation of program logic, through dedicated logic, through the interaction of program control and dedicated logic, or even manually, the particular technique being selectable by the implementer as more specifically understood from the context.

The method and system embodiments described herein merely illustrate particular embodiments of the invention. It should be appreciated that those skilled in the art will be able to devise various arrangements, which, although not explicitly described or shown herein, embody the principles of the invention and are included within its spirit and scope.

For example, a MIMO-Spread spectrum transmitter and receiver may code symbol sequences from one or more users onto a transmitter array for transmission over a channel to a receiver array. The transmitter would typically code the symbols across spread-spectrum subchannels and multiple antennas. The space-time coding and the frequency-selective space-time channel introduce correlation across subchannels and receive antennas, and this correlation must be accounted for in the iterative interference canceller, such as previously described.

Furthermore, all examples and conditional language recited herein are intended to be only for pedagogical purposes to aid the reader in understanding the principles of the invention. This disclosure and its associated references are to be construed as applying without limitation to such specifically recited examples and conditions. Moreover, all statements herein reciting principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future, i.e., any elements developed that perform the same function, regardless of structure. 

1. A processing engine, comprising: a first input configured for receiving an input signal; a plurality of outputs, wherein each output is configured for providing a substantially interference canceled signal; at least one second input configured for receiving one of the substantially interference canceled signals from one of the outputs; and an interference selector configured for receiving the input signal and the substantially interference canceled signal and for selecting an interfering signal from each of the input signal and said at least one substantially interference canceled signal; wherein the processing engine is configured for substantially canceling an interfering signal from the input signal and from at least one of the substantially interference canceled signals.
 2. The processing engine of claim 1, wherein the processing engine is configurable with at least one of a handset receiver and a base station receiver.
 3. The processing engine of claim 1, wherein the interference selector is configured for selecting interfering signal paths based on pre-determined criteria.
 4. The processing engine of claim 1, further comprising a plurality of matrix generators, wherein each of the plurality of matrix generators is communicatively coupled to the interference selector and configured for generating a matrix based on a selected interfering signal provided by the interference selector.
 5. The processing engine of claim 4, wherein each of the plurality of matrix generators is configured to generate a matrix constructed from at least one vector to produce a plurality of matrices, and wherein each of the at least one vector comprises elements from the selected interfering signal.
 6. The processing engine of claim 4, wherein the processing engine is further configured for substantially canceling a plurality of interfering signals from the input signal or from at least one of the substantially interference canceled signals wherein each matrix generator is configured for generating a matrix based on a selected plurality of interfering signals.
 7. The processing engine of claim 6, wherein the plurality of matrix generators are adapted to construct the plurality of matrices from at least one vector, and wherein at least one of the at least one vector is a composite vector comprising elements from at least two of the selected plurality of interfering signals.
 8. The processing engine of claim 1, further comprising a processor configured for generating a plurality of cancellation operators, wherein each cancellation operator is used to substantially cancel one of the interfering signals to produce at least one substantially interference canceled signal.
 9. The processing engine of claim 8, further comprising a plurality of applicators, wherein each applicator is communicatively coupled to the processor and configured for applying one of the cancellation operators to either the input signal or said at least one substantially interference canceled signal.
 10. The processing engine of claim 9, wherein at least one of the applicators is configured for applying one of the cancellation operators according to the form: y′=y−S(S ^(T) S)⁻¹ S ^(T) y, where y′ is an output canceled signal, y is a received signal, S is an interference matrix and S^(T) is a transpose of S.
 11. The processing engine of claim 8, wherein each cancellation operator is a projection operator configured for projecting either the input signal or said at least one substantially interference canceled signal onto a subspace that is substantially orthogonal to one of the interfering signals.
 12. The processing engine of claim 11, wherein each projection operator comprises the form: P _(s) ^(⊥) =I−S(S ^(T) S)⁻¹ S ^(T), wherein P_(s) ^(⊥) is the projection operator, I is an identity matrix, S is an interference matrix and S^(T) is a transpose of the interference matrix.
 13. The processing engine of claim 8, wherein at least one of the cancellation operators is configured to substantially cancel one of the interfering signals via an approximated projection operation comprising the form: $y^{\prime} \approx {y - {\sum\limits_{j = 1}^{t}\;{\frac{\left\langle {s_{j},y} \right\rangle}{{s_{j}}^{2}}s_{j}}}}$ where y′ is an output canceled signal, y is a received signal, S is an interference matrix, s_(j) is the j^(th) column vector of S and t is the number of vectors in S.
 14. The processing engine of claim 1, wherein the input signal comprises a plurality of digital signals selected from a group consisting of a Code Division Multiple Access signal, a Wideband Code Division Multiple Access signal, a broadband Code Division Multiple Access signal, a Global Positioning Signal, and a Universal Mobile Telephone Service signal.
 15. The processing engine of claim 1, further comprising at least one delay element, wherein each of the at least one delay element is used for compensating delay introduced by the processing engine.
 16. The processing engine of claim 1, further comprising at least one advance element, wherein each of the at least one advance element is adapted to advance an on-time PN code by a duration substantially equal to delay introduced by the processing engine.
 17. A system, comprising: means for receiving an input signal; means for substantially canceling a signal interfering with the input signal to generate a first substantially interference canceled signal; means for receiving the first substantially interference canceled signal, wherein the means for substantially canceling a signal interfering with the input signal further comprises means for substantially canceling a signal interfering with the first substantially interference canceled signal to generate a second substantially interference canceled signal, wherein the means for substantially canceling the signal interfering with the input signal comprises means for performing a cancellation operation on the input signal according to the form: y′=y−S(S ^(T) S)⁻¹ S ^(T) y, where y′ is the first substantially interference canceled signal, y is a received signal, S is an interference matrix and S^(T) is a transpose of S.
 18. The system of claim 17, further comprising means for generating a cancellation operator in response to receiving the input signal.
 19. The system of claim 18, wherein the means for generating the cancellation operator comprises means for generating a projection operator according to the form: P _(s) ^(⊥) =I−S(S ^(T) S)⁻¹ S ^(T) wherein P_(s) ^(⊥) is the projection operator, I is an identity matrix, S is an interference matrix and S^(T) is a transpose of the interference matrix.
 20. The system of claim 17, further comprising means for generating a cancellation operator in response to receiving the first substantially interference canceled signal.
 21. The system of claim 20, wherein the means for generating the cancellation operator comprises means for generating a projection operator according to the form: P _(s) ^(⊥) =I−S(S ^(T) S)⁻¹ S ^(T) wherein P_(s) ^(⊥) is the projection operator, I is an identity matrix, S is an interference matrix and S^(T) is a transpose of the interference matrix.
 22. The system of claim 17, wherein the means for substantially canceling the signal interfering with the first substantially interference canceled signal comprises means for applying a cancellation operator to the input signal according to the form: y″=y′−S(S ^(T) S)⁻¹ S ^(T) y, where y″ is the second substantially interference canceled signal, y′ is the first substantially interference canceled signal, S is an interference matrix and S^(T) is a transpose of S.
 23. The system of claim 17, wherein the means for substantially canceling the signal interfering with the first substantially interference canceled signal comprises means for performing a cancellation operation on the first substantially interference canceled signal according to the form: y″=y′−S(S ^(T) S)⁻¹ S ^(T) y, where y″ is the second substantially interference canceled signal, y′ is the first substantially interference canceled signal, S is an interference matrix and S^(T) is a transpose of S.
 24. The system of claim 17, wherein the means for substantially canceling the signal interfering with the first substantially interference canceled signal comprises means for performing a cancellation operation on the first substantially interference canceled signal resulting in an approximated projection operation comprising the form: $y^{''} \approx {y^{\prime} - {\sum\limits_{j = 1}^{t}\;{\frac{\left\langle {s_{j},y} \right\rangle}{{s_{j}}^{2}}s_{j}}}}$ where y″ is the second substantially interference canceled signal, y′ is the first substantially interference canceled signal, S is an interference matrix, s_(j) is the j^(th) column vector of S and t is the number of vectors in S.
 25. The system of claim 17, further comprising means for transferring the first substantially interference canceled signal and the second substantially interference canceled signal to a receiver.
 26. The system of claim 25, wherein the receiver is configurable with a handset or a base station.
 27. The system of claim 17, wherein the input signal comprises a plurality of digital signals selected from a group consisting of a Code Division Multiple Access signal, a Wideband Code Division Multiple Access signal, a broadband Code Division Multiple Access signal, a Global Positioning Signal, and a, Universal Mobile Telephone Service signal.
 28. The system of claim 17, further comprising one or more delay elements, wherein each of the one or more delay elements is configured for compensating delay introduced by the processing engine.
 29. The system of claim 17, further comprising one or more advance elements, wherein each of the one or more advance elements is configured for advancing an on-time PN code by a duration substantially equal to delay introduced by the processing engine.
 30. A handset comprising a processing engine, the processing engine comprising: a first interference canceller configured for receiving an input signal and configured for providing a substantially interference canceled signal; at least one second interference canceller configured for receiving the substantially interference canceled signal; and an interference selector configured for receiving the input signal and the substantially interference canceled signal and for selecting an interfering signal from each of the input signal and said at least one substantially interference canceled signal, wherein the second interference canceller is configured for substantially canceling an interfering signal from the at least one substantially interference canceled signal.
 31. The handset recited in claim 30, wherein the interference selector is configured for selecting interfering signal paths based on pre-determined criteria.
 32. The handset of claim 31, further comprising a plurality of matrix generators, wherein each of the plurality of matrix generators is communicatively coupled to the interference selector and configured for generating a matrix based on a selected interfering signal provided by the interference selector.
 33. The handset of claim 32, wherein each of the plurality of matrix generators is configured to generate a matrix constructed from at least one vector to produce a plurality of matrices, and wherein each of the at least one vector comprises elements from the selected interfering signal.
 34. The handset of claim 32, wherein the processing engine is further configured for substantially canceling a plurality of interfering signals from the input signal or from at least one of the substantially interference canceled signals wherein each matrix generator is configured for generating a matrix based on a selected plurality of interfering signals.
 35. The handset of claim 34, wherein the plurality of matrix generators are adapted to construct the plurality of matrices from at least one vector, and wherein at least one of the at least one vector is a composite vector comprising elements from at least two of the selected plurality of interfering signals.
 36. The handset of claim 30, further comprising a processor configured for generating a plurality of cancellation operators, wherein each cancellation operator is used to substantially cancel one of the interfering signals to produce at least one substantially interference canceled signal.
 37. The handset of claim 36, further comprising a plurality of applicators, wherein each applicator is communicatively coupled to the processor and configured for applying one of the cancellation operators to either the input signal or said at least one substantially interference canceled signal.
 38. The handset of claim 37, wherein at least one of the applicators is configured for applying one of the cancellation operators according to the form: y′=y−S(S ^(T) S)⁻¹ S ^(T) y, where y′ is an output canceled signal, y is a received signal, S is an interference matrix and S^(T) is a transpose of S.
 39. The handset of claim 36, wherein each cancellation operator is a projection operator configured for projecting either the input signal or said at least one substantially interference canceled signal onto a subspace that is substantially orthogonal to one of the interfering signals.
 40. The handset of claim 39, wherein each projection operator comprises the form: P _(s) ^(⊥) =I−S(S ^(T) S)⁻¹ S ^(T), wherein P_(s) ^(⊥) is the projection operator, I is an identity matrix, S is an interference matrix and S^(T) is a transpose of the interference matrix.
 41. The handset of claim 36, wherein at least one of the cancellation operators is configured to substantially cancel one of the interfering signals via an approximated projection operation comprising the form: $y^{\prime} \approx {y - {\sum\limits_{j = 1}^{t}\;{\frac{\left\langle {s_{j},y} \right\rangle}{{s_{j}}^{2}}s_{j}}}}$ where y′ is an output canceled signal, y is a received signal, S is an interference matrix, s_(j) is the j^(th) column vector of S and t is the number of vectors in S.
 42. The handset of claim 30, wherein the input signal comprises a plurality of digital signals selected from a group consisting of a Code Division Multiple Access signal, a Wideband Code Division Multiple Access signal, a broadband Code Division Multiple Access signal, a Global Positioning Signal, and a Universal Mobile Telephone Service signal.
 43. The processing engine of claim 30, further comprising at least one delay element, wherein each of the at least one delay element is used for compensating delay introduced by the processing engine.
 44. The processing engine of claim 30, further comprising at least one advance element, wherein each of the at least one advance element is adapted to advance an on-time PN code by a duration substantially equal to delay introduced by the processing engine.
 45. A handset, comprising: an antenna configured for receiving a radio signal, wherein the radio signal comprises at least one signal of interest and one or more interfering signals; an analog to digital converter configured for converting the radio signal to a digital signal; an input signal coupler configured for receiving the digital signal to produce an input signal; a first interference canceller configured for substantially canceling a signal interfering with the input signal to generate a first substantially interference canceled signal; means for generating a cancellation operator in response to receiving the first substantially interference canceled signal; and a second interference canceller configured for receiving the first substantially interference canceled signal, wherein the second interference canceller is further configured for substantially canceling a signal interfering with the first substantially interference canceled signal to generate a second substantially interference canceled signal.
 46. The handset of claim 45, further comprising means for generating a cancellation operator in response to receiving the input signal.
 47. The handset of claim 46, wherein the means for generating the cancellation operator comprises means for generating a projection operator according to the form: P _(s) ^(⊥) =I−S(S ^(T) S)⁻¹ S ^(T), wherein P_(s) ^(⊥) is the projection operator, I is an identity matrix, S is an interference matrix and S^(T) is a transpose of the interference matrix.
 48. The handset of claim 45, wherein the first interference canceller comprises means for performing a cancellation operation on the input signal according to the form: y′=y−S(S ^(T) S)⁻¹ S ^(T) y, where y′ is the first substantially interference canceled signal, y is a received signal, S is an interference matrix and S^(T) is a transpose of S.
 49. The handset of claim 45, wherein the first interference canceller comprises means for performing a cancellation operation on the input signal resulting in an approximated projection comprising the form: $y^{\prime} \approx {y - {\sum\limits_{j = 1}^{t}\;{\frac{\left\langle {s_{j},y} \right\rangle}{{s_{j}}^{2}}s_{j}}}}$ where y′ is an output canceled signal, y is a received signal, S is an interference matrix, s_(j) is the j^(th) column vector of S and t is the number of vectors in S.
 50. The handset of claim 45, wherein the means for generating the cancellation operator comprises means for generating a projection operator according to the form: P _(s) ^(⊥) =I−S(S ^(T) S)⁻¹ S ^(T), wherein P_(s) ^(⊥) is the projection operator, I is an identity matrix, S is an interference matrix and S^(T) is a transpose of the interference matrix.
 51. The handset of claim 45, wherein the second interference canceller comprises means for applying a cancellation operator to the input signal according to the form: y″=y′−S(S ^(T) S)⁻¹ S ^(T) y, where y″ is the second substantially interference canceled signal, y′ is the first substantially interference canceled signal, S is an interference matrix and S^(T) is a transpose of S.
 52. The handset of claim 45, wherein the second interference canceller comprises means for performing a cancellation operation on the first substantially interference canceled signal according to the form: y″=y′−S(S ^(T) S)⁻¹ S ^(T) y, where y″ is the second substantially interference canceled signal, y′ is the first substantially interference canceled signal, S is an interference matrix and S^(T) is a transpose of S.
 53. The handset of claim 45, wherein the second interference canceller comprises means for performing a cancellation operation on the first substantially interference canceled signal resulting in an approximated projection operation comprising the form: $y^{''} \approx {y^{\prime} - {\sum\limits_{j = 1}^{t}\;{\frac{\left\langle {s_{j},y} \right\rangle}{{s_{j}}^{2}}s_{j}}}}$ where y″ is the second substantially interference canceled signal, y′ is the first substantially interference canceled signal, S is an interference matrix, s_(j) is the j^(th) column vector of S and t is the number of vectors in S.
 54. The handset of claim 45, further comprising means for transferring the first substantially interference canceled signal and the second substantially interference canceled signal to a receiver.
 55. The handset of claim 54, wherein the receiver is configurable with a handset or a base station.
 56. The handset of claim 45, wherein the input signal comprises a plurality of digital signals selected from a group consisting of a Code Division Multiple Access signal, a Wideband Code Division Multiple Access signal, a broadband Code Division Multiple Access signal, a Global Positioning Signal, and a Universal Mobile Telephone Service signal.
 57. The system of claim 45, further comprising one or more delay elements, wherein each of the one or more delay elements is configured for compensating delay introduced by the processing engine.
 58. The system of claim 45, further comprising one or more advance elements, wherein each of the one or more advance elements is configured for advancing an on-time PN code by a duration substantially equal to delay introduced by the processing engine. 